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一种新型高阶两通道时间交织ΣΔ调制器系统结构 被引量:1

A Novel Architecture of High-Order Two-Channel Time-Interleaved ΣΔ Modulator
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摘要 为了减小两通道时间交织ΣΔ调制器中通道之间系数失配引起的折叠噪声,提出了一种新型的高阶两通道时间交织ΣΔ调制器的系统结构.通过在传统噪声传递函数(NTF)中增加一个奈奎斯特频率处的零点,得到了一种新的NTF.新增的零点减小了NTF在高频处的幅值,从而能够减小两通道时间交织调制器结构中由于系数失配引起的折叠噪声.以实现新NTF的单通道单环4阶3位前馈分布型ΣΔ调制器结构为原型,利用多抽样率系统和块数字滤波器基本原理,得到其对应的两通道时间交织系统结构.在两个通道的系数存在1%的失配条件下,调制器的信号噪声失真比只降低了3.1 dB,这表明系数失配对该调制器的性能影响很小. To alleviate the folded noise due to coefficient mismatches between the two channels in two channel time-interleaved (TI) ∑△ modulators, a novel architecture of high-order two-channel time-interleaved ∑△ modulator is proposed. By adding a zero to the Nyquist frequency in the conventional noise transfer function (NTF), a new type of NTF is obtained. The amount of the folded noise can be reduced because the amplitude of the new NTF at high frequencies is reduced by the added zero. A single-channel single-loop fourth-order 3-bit distributed feedforward ∑△ modulator is proposed to implement the new NTF. The architecture of the two-ehannel TI ∑△ modulator is derived from the single-channel modulator based on the theory of multirate system and block digital filter. The degradation of the signal-to-noise-plus-distortion ratio of the proposed modulator is only 3.1 dP, with 1% coefficient mismatches, which shows that the proposed architecture is insensitive to coefficient mismatches.
出处 《西安交通大学学报》 EI CAS CSCD 北大核心 2008年第8期996-1000,共5页 Journal of Xi'an Jiaotong University
基金 西安应用材料创新基金资助项目(XA-AM-200506)
关键词 ∑△调制器 时间交织 折叠噪声 块数字滤波器 ∑△ modulator time-interleaved folded noise block digital filter
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参考文献10

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同被引文献16

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