片内频率补偿实现电流模DC-DC高稳定性

Implementation of high stability with on-chip frequency compensation in a current mode DC-DC converter

提出了一种适用于电流模DC-DC的片内频率补偿结构,针对其采用低有效串联电阻陶瓷输出电容的特点,通过片内集成的阻容网络完成环路的频率补偿,克服了稳定性对输出负载的依赖,减少了芯片引脚,节省了印制板面积,实现了芯片的高稳定性.同时通过优化反馈网络设计,实现了交越频率不随输出电压变化,进一步改进了阶跃响应.该结构在一款0.5μm CMOS工艺的降压型DC-DC中进行了投片验证,测试结果显示了良好的稳定性,负载调整率以及线性调整率均小于0.4%,400 mA负载阶跃对应输出电压的响应时间小于8μs,同时应用印制板面积减小了14%.

An on-chip frequency compensation structure for the current mode DC-DC converter is presented. With an integrated RC network, it realizes the loop frequency compensation and overcomes the drawback of stability dependency on load resistance due to the output ceramic capacitor＇s low effective series resistance, which reduces the pin numbers, saves the PCB space and stabilizes the chip. Also the optimized feedback network makes the crossover frequency insensitive to the change of the output voltage, improving the load step response further. A DC-DC buck converter with a proposed structure has been fabricated with a 0.5 um CMOS process for validation. The measurement results show good stability. Both load and line regulations are less than 0.4%. And the output voltage can be recovered within 8 us for a 400 mA load step. The occupied PCB space is also reduced 14%.