一种新型的具有稀疏化功能的半导体辐射探测器读出电路

A Novel Integrated Circuit for Semiconductor Radiation Detectors with Sparse Readout

提出了一种适用于半导体辐射探测器的全集成CMOS读出电路,该电路结合自触发方式,采用新型的稀疏化方法。当一个通道占用公共输出级时,其它通道的触发信号被延迟后再读出,从而减小了时间死区,降低误码率。除了这种稀疏化读出模式,电路还允许顺序读出,只要有一个通道触发,就依次读出所有通道的模拟电压和数字地址。该读出电路包括电荷灵敏放大器、脉冲成形器、峰值保持电路和数字控制部分,基于0.5μm DPTM CMOS工艺设计。一个四通道的试验芯片已交付加工。后仿真结果表明,正向工作时,该电路增益为79.3mV/fC,功耗为每通道4mW,线性度为99.92%。理论分析计算得出16通道,每通道粒子速率100k/s条件下,本文提出的稀疏化读出方法误码率约为2.5%,比常用的扫描方式降低了37%左右。

A novel fully integrated CMOS readout circuit for semiconductor radiation detector with sparse readout is presented. The new sparse scheme is. when one channel is being read out, the trigger signal from other channels is delayed and then processed. Therefore, the dead time is reduced and so is the error rate. Besides sparse readout, sequential readout is also allowed, which means the analog voltages and addresses of all the channels are read out sequentially once there is a channel triggered. The circuit comprises Charge Sensitive Amplifier （CSA）, pulse shaper, peak detect and hold circuit, and digital logic. A test chip of four channels designed in a 0. 5um DPTM CMOS technology has been taped out. The results of post simulation indicate that the gain is 79.3mV/fCwith a linearity of 99. 92%. The power dissipation is 4mW per channel. Theory analysis and calculation shows that the error probability is approximately 2. 5%, which means a reduction of about 37% is obtained compared with the traditional scanning scheme, assuming a 16-charmel system with a particle rate of 100k/s per channel.