摘要
本文论述了频标计量仪器中倍频器和分频器两种电路的设计思想。通过对经典电路的分析,简要介绍了降低电路噪声的工艺。实践证明,这些工艺是很有效的。
The paper discusses the thinking approach about the design of two circuits-freq. multipiicator and freq. divider in the freq. standard measuring instrument. Through analysing the classical and the practical circuits, it introduces these technologies about lowering the noise in circuits simply. These technologies are proved to be very effective in practice.
出处
《石家庄经济学院学报》
1997年第3期283-288,298,共7页
Journal of Shijiazhuang University of Economics
关键词
低噪声倍频
电路
低噪声设计
频标计量仪器
low noise freq. multiplication, current switch, harmonic wave Sampling, trigger error, accumulating error on the time drift