一种快速高效的二维一级小波变换的硬件实现

An Efficient High Speed VLSI Architecture for 1-level 2-D Discrete Wavelet Transform

提出了一种针对9/7小波滤波器的二维一级小波变换的硬件平台,整体结构采用流水方式实现,数据分组输入,列变换采用多个小波变换单元,行变换模块为可重构硬件结构,行列变换之间不需要片上存储器。与已有结构相比,该结构可以通过更少的硬件资源消耗获得更高的处理速度。

An efficient and high speed pipeline Very Large Scale Integration（VLSI） architecture for -1 leve1 2-D Discrete Wavelet Transform（DWT） is proposed, of which buffer between column and row transform is not needed. Its row transform module is a reconfigurable hardware and can be dynamically programmed. Comparison resuhs show this architecture can compute at a higher speed with less hardware consume.