基于通用交换接口(CSIX)的交换机SOC设计

A design of switch chip using CSIX interface protocol

通用交换接口(CSIX)协议是一种适用于通用交换机设计的接口协议.提出一种可扩展的交换机系统芯片(SOC)设计方案,它是以Cross-bar无阻塞交换结构为核心,结合CSIX接口的特点来实现高速可扩展的通用数据包交换芯片设计.并对其关键部分如收发模块,它的HDL语言设计实现方案进行了重点阐述,利用FP-GA设计实现整个系统模块功能,兑现一款8×8的32bits数据线接口的SOC芯片.经测试,该FPGA兑现的SOC芯片可达单片Gbps的数据交换能力.

The Common Switch Interface （CSIX） specification is a protocol widely used for common switch interface design. This article proposed a scheme for expandable switch system chip （ SOC ） design. The design takes Cross-bar to realize non-blocking data exchange in switch chip design. In this article, we made a detailed introduction to the design of HDL language design realization scheme in transceiver Module. By using FPGA, we realize the whole functions of the module in the system, completing an SOC chip with 8 × 8 32bits data line interface. Test on SOC chip shows that, using the FPGA can reach the data exchange ability of a single Gbps chip.