积分梳状滤波器的FPGA实现

Realization of CIC Filter Based on FPGA

为了解决软件无线电通信系统中频采样之后的极大数据量在基带处理部分对DSP计算的压力,常采用多速率处理技术。多速率处理过程中需要使用积分梳状滤波器、半带滤波器和高阶FIR滤波器。在分析了积分梳状滤波器的结构和特性的基础上,阐述了多级CIC滤波器一种高效的FPGA实现方法,该方法的正确性和可行性通过QuartusⅡ的时序仿真分析得以验证,实际中可以推广应用。

In software defined radio system, in order to resolve the pressure problem of huge data quantity to DSP computation in the baseband after intermediate frequency sampling, uses the technique of multi -rate processing. Multi -rate processing need to use integrator comb filter, half - band filters and high -FIR filter. This paper analyses the CIC filter structure and characteristics, introduces an effective method basic on FPGA to realize the filter. In the end, the exactness and feasibility of this method are verified by timing simulation with Quartus II,this method can be used in practice.