基于Verilog-AMS的Σ-△调制器的建模与仿真

Modeling and simulation of Σ-△ modulator using Verilog-AMS

分析了作为Σ-△型A/D转换器主要部分的Σ-△调制器的结构原理的基础上,采用Verilog-AMS语言对其行为进行高层次建模。通过理论分析和Cadence Spectre仿真器对该行为模型进行了仿真验证,并与SPICE仿真结果对比证明该模型正确且易用于系统验证。

The structure and principle of Σ-△ modulator are introduced. For the verification in its system design,Σ-△ modulator is modeled in high level to descript its behavior by hard description language Verilog-AMS. By CadenceSpectre’s simulation, in com parision with the SPICE’s result, the model is proved crrect and easy to use for system verification.