摘要
针对高密度数据计算的要求,提出了一种VLIW处理器阵列多芯片互联的简单方法,通过独特的微码结构,建立具有可配置特征的高速数据通道的控制模型,适合构建高性能的媒体处理器阵列,模型能有效地改善系统扩展所需要的灵活性,实现高带宽的存储器接口和高性能的总线控制结构,提高了数据存取的连续性和灵活性,避免了运行过程中大量不必要的系统中断和功能切换开销,可显著提高数据处理带宽。
A Method of Processor array to enable VLIW processors connected directly was presented for data stream processing. The high performance VLIW array for media processing that has excellent memory and bus access have been implemented by the way of joint of microcode and hierarchical design. The flexibly of these structures which has reconfigurable function can improve the performance of data stream throughput and avoid unnecessary system interrupt. The fault ratio of pipeline in processor has been reduced to improve processing bandwide significantly.
出处
《微处理机》
2008年第3期5-7,共3页
Microprocessors
基金
国家重点基础研究发展规划(973)项目(No.G1999032904)
北京交通大学人才基金
