摘要
从互连结构、存储空间分配、启动模式以及双核通信机制方面介绍了一种异构型双核SOC平台的体系结构。软硬件协同验证和FPGA原型验证表明系统功能正确,用SMIC 0.18μmCMOS工艺进行逻辑综合,并完成了门级功能及时序验证。
The paper presents the architecture of a heterogeneous dual - core SOC platform which integrates two microprocessors in a single chip from following aspects： the interconnect structure, the principle of the memory space mapping, the system boot mode and the dualcore communication mechanism. Results of software/hardware co -verification and FPGA prototype verification prove that the function of the system is correct. Logic synthesis is done using SMIC 0. 18μm CMOS technology, the gatelevel functional and timing verification is also done.
出处
《微处理机》
2008年第3期39-42,共4页
Microprocessors
关键词
微处理器
超标量
单芯片多处理器
协同验证
Microprocessor
Superscalar
Single - chip muhiprocessor
Co - verification
