摘要
A high-voltage p-LDMOS（HV-pMOS） with field-oxide as gate dielectric and a RESURF drain drift region to undertake high gate-source voltage and drain-source voltage for the scan driver chip of plasma display panels （PDP） is purposed based on the epitaxial bipolar-CMOS-DMOS （BCD） process. The key considerations and parameters of the design are discussed：the thickness of gate dielectrics is 1mm and the area of the device is 80μm × 80μm. Only 18 photoetching steps are needed in the developed process,which is compatible with standard CMOS, bipolar, and VDMOS devices. The breakdown voltage of the HV-pMOS in the process control module （PCM） is more than 200V. The results are favorable for 170V PDP scan driver chips,which contribute to the competitive cost efficiency.
报道了基于硅外延BCD工艺的高栅源、高漏源电压的功率pMOS的设计.采用1μm厚的场氧化层作为栅氧介质及RESURF原理优化的漏极漂移区,器件面积为80μm×80μm,工艺上简化为18次光刻,兼容标准CMOS、双极管和高压VDMOS.测试管耐压超过200V,集成于64路170VPDP扫描驱动芯片,通过了上机测试.
基金
the National High Technology Research and Development Program of China(No.2003AA1Z1410)
the Xi'an Science and Technology Planning Project(No.ZX04003)~~
