摘要
本文设计实现了一个高精度的双通道过采样A/D电路,它采用由两个二阶调制器级联实现的四阶增量-总和调制器结构,并通过优化调制器内部各级增益,在改善过采样A/D的大信号过载特性的同时提高其最大输出信嗓比.为降低数字开关噪声对过采样A/D性能的影响,本文采用了一种低噪声电流控制逻辑设计数字电路.实验芯片的测试结果表明,在64倍的过采样率下,电流控制逻辑通道和静态CMOS逻辑通道分别获得了91dB和84.5dB的输出动态范围.
This paper describes the design and implementation of a dual channel oversampled A/D converter. The converter uses a cascaded 4th order sigma-delta modulator. Through the modification of modulator's interstage gains,the modulator' large signal overload problem is alleviatednd the maximum output signal to noise ratio is increased. A low noise current-steering logic is introduced to replace static CMOS for digital circuit design,which reduces the digital switching noise coupling in the A/D converter.The experimental chip is fabricated in 3μm CMOS technology. Test results show that, with a oversampling ratio of 64,a 91dB and 84.5dB dynamic range for two channels is achieved which uses current-steering logic and static CMOS respectively.
出处
《电子学报》
EI
CAS
CSCD
北大核心
1997年第11期6-10,31,共6页
Acta Electronica Sinica