SOC技术及系统级低功耗设计

SOC Techology and System-level Low-power Design

介绍了SOC设计中的IP核可复用技术、软硬件协同设计技术、SOC验证技术、可测性设计技术以及低功耗设计技术。对SOC低功耗设计中的瞬态功耗优化、平均功耗优化以及功耗的物理来源、电容充放电功耗、短路功耗、静电漏电功耗进行了分析。并对典型SOC设计中采取降低芯片和封装电容、降低电源电压,达到降低功耗的技术进行了研究。最后对系统级功耗设计中的电源系统低功耗设计、工作系统低功耗设计进行了探讨。

The paper introduced the technology of IP Reuse, hardware and software co-design, SOC verification, measurement and low-power design on the SOC design. SOC on the low-power design of the transient power optimization, the average power consumption optimization and the physical power sources, capacitors charge and discharge power, short-circuit power consumption, static leakage power were also analyzed. On the design of the typical SOC chip design, packaging to reduce capacitance and lower supply voltage to reduce power consumption of the technology were studied. Finally, low-power design of the power system on the systemlevel power designand low-power design in operation system were discussed.