高速并行科斯塔斯环的设计

Design of High-speed Parallel Costas Loop

卫星通信业务量的增加对卫星数据传输速率提出了更高的要求。并行结构能够利用器件规模换取处理速度,因此成为高速数字解调系统突破器件速率瓶颈的首选。科斯塔斯环(Costas Loop)被广泛应用于抑制载波通信系统的载波同步。本文介绍了高速并行结构科斯塔斯环的设计方法,并对其瞬态误差和噪声性能进行了理论和仿真分析。

Higher speed is needed in satellite communication as a result of business increase. In order to exceed the restriction of device speed, parallel structure is applied in high-speed digital receiver. Costas loop is widely used to synchronize carrier in suppressed carrier communication system. The design of high-speed parallel costas loop is presented in this paper. And its transient error and noise performance are analyzed hy means of both theory and simulation.