摘要
为了减少SoC芯片的测试数据,提出了一种基于组扩展编码的测试数据压缩方案。该方案采用变长到变长的编码方式对任意长度的0游程和1游程编码,代码字由标记位、前缀和尾部组成。组扩展码将每组的容量扩大了一倍,能有效压缩芯片测试数据量。理论分析和实验结果表明组扩展编码能取得很好的压缩效果,而且能够更好地适应于不同的测试电路。
A scheme of test data compression based on the Group and Expansion Code (GEC) was presented to reduce compression data of System-on-a-Chip ( SoC). It is a variable-to-variable code based on encoding both O's run and 1's run, and the code word consists of marked bit, prefix and tail. Due to the characteristics of GEC, which lies in its ability to double capacity of every group, it can compress test data efficiently. Theoretical analysis and experimental results show that the proposed scheme can provide a higher compression efficiency than FDR and has a better adaptability to various test sets.
出处
《计算机应用》
CSCD
北大核心
2008年第10期2701-2703,2724,共4页
journal of Computer Applications
基金
国家自然科学基金资助项目(90407008)
国家自然科学基金资助项目(60633060)
安徽省自然科学基金资助项目(050420103)
安徽省教育厅自然科学项目(KJ2008B031)
关键词
测试数据压缩
变长-变长的编码
组扩展编码
test data compression
variable-to-variable-length code
Group and Expansion Code (GEC)