摘要
根据ATA标准,对Ultra DMA突发数据传输终止阶段的CRC部分进行了研究,利用了FPGA控制功能灵活的优点,在QuartusⅡ开发平台上进行设计仿真,较好地完成了UDMA突发数据传输中的CRC校验,实验结果表明设计的正确性,可在实际应用中验证其可行性。
According toATA standards,CRC(Cyclial Redundancy Check) computing during the termination of an Ul- tra DMA data-out burst is presented; Under the implementation of FInAls flexible control action and its powerful development software QUARTUS Ⅱ, the design and simulation is accomplished. So, the calibration of CRC is well completed. The result indicates the validity of the design. We can prove the feasibility of the design in application.
出处
《电子器件》
CAS
2008年第5期1677-1680,共4页
Chinese Journal of Electron Devices