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一种高性能、低功耗音频ΣΔ调制器 被引量：3

A High-Performance,Low-Power ΣΔ Modulator for Digital Audio Applications
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摘要 设计了一个应用于18位高端音频模数转换器(ADC)的三阶低功耗ΣΔ调制器.调制器采用2-1级联结构,通过优化调制器系数来提高其动态范围,并减小调制器输出频谱中的杂波.电路设计中采用栅源自举技术实现输入信号采样开关,有效提高了采样电路的线性度;提出一种高能效的A/AB类跨导放大器,在仅消耗0.8mA电流的情况下,达到100V/μs以上的压摆率.针对各级积分器不同的采样电容,逐级对跨导放大器进行进一步功耗优化.调制器在中芯国际0.18μm混合信号CMOS工艺中流片,芯片核心面积为1.1mm×1.0mm.测试结果表明在22.05kHz带宽内,信噪失真比和动态范围分别达到91dB和94dB.在3.3V电源电压下,调制器功耗为6.8mW,适合于高性能、低功耗音频模数转换器应用. A third-order low-power ΣΔ modulator for a high-end 18bit audio-band analog-to-digital converter is developed. The modulator is based on a 2-1 cascaded architecture with optimized coefficients to extend the dynamic range and reduce the spectrum tones. The gate-source bootstrapping technique is employed to enhance the sampling switch linearity. A power-efficient class A/AB opera- tional transconductance amplifier （OTA） is proposed, which achieves a high slew rate of 100V/μs with only 0.8mA current consumption. The OTA designed for the second and third integrators is a scaled version of the first OTA,which allows for further power reduction. The modulator is implemented in SMIC mixed-signal 0.18μm CMOS technology,and the area is 1. 1mm x 1.0mm. Experimental results indicate a peak signal-to-noise-and-distortion ratio （SNDR） of 91dB and a dynamic range of 94dB over a 22. 05kHz bandwidth. The chip operates under a 3.3V power supply with a power dissipation of 6.8mW, which is suitable for high-performance,low-power audio ADC applications.
作者 马绍宇 韩雁 黄小伟 杨立吾
机构地区 浙江大学微电子与光电子研究所 中芯国际集成电路制造有限公司
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第10期2050-2056,共7页 半导体学报（英文版）
关键词 ΣΔ调制器 栅源自举 低功耗 音频模数转换器 ΣΔ modulator gate-source bootstrapped low power audio analog-to-digital converter
分类号 TN761 [电子电信—电路与系统]
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参考文献13

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二级参考文献10

共引文献4

同被引文献20

  • 1沈佳铭,洪亮,石春琦,赖宗声.一种用于音频DAC的可重构Σ-Δ调制器的设计[J].微电子学,2007,37(3):432-435. 被引量：2
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引证文献3

二级引证文献5

Journal of Semiconductors
2008年 第10期

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