摘要
采用一种迭代算法实现ATM信头错误定位,对CRC进行校验并纠正32位原始数据和8位CRC码中单比特传输错误电路。实验结果表明,相对于一般的查找表,该种电路结构简单、运行速度高。
This paper uses a repetitive algorithm for determining the corrupted bit position, implement an efficient hardware CRC check circuit which can detect multiple bits error and correct single-bit transport error in 32-bits of original data or in 8-bits of CRC code. The experiment result shows that the check circuit has low complexity and high processing speed relative to look-up table.
出处
《计算机工程》
CAS
CSCD
北大核心
2008年第B09期93-95,104,共4页
Computer Engineering
关键词
异步传输模式
循环冗余校验码
并行处理
Asynchronous Transfer Mode(ATM)
Cyclic Redundancy Code(CRC)
parallel processing