时钟系统信号完整性的实际案例分析

Analysis of Case for Clock System's Signal Integrality

介绍高频时钟系统的逻辑设计、PCB设计原则以及抗干扰设计,结合实例论述了阻抗匹配的重要性以及阻抗失配带来的后果。

After introducing the logic, PCB and anti-jamming＇s deign principle of the high frequency clock system, this paper conthines a practical case to put forward the importance of impedance matching and the consequence of impedance losing matching.