嵌入式微处理器片上调试系统的设计和验证

Design and Verification of On-chip Debug System on Embedded Microprocessor

为了尽可能保持芯片原有体系结构,综合基于软件监控和基于JTAG的2种方法,提出扩展嵌入式处理器片上调试系统的完整解决方案。该系统包括PC端的开发环境IDE、命令转发与控制子系统Probe和支持JTAG标准的目标CPU等部分。通过软硬件协同设计和验证,确保系统划分正确,子系统协调工作,并缩短了调试系统的开发周期。

With limited modification of the original architecture, this paper proposes a solution that combines the existing software-monitor-based and JTAG-based approaches to extend the embedded microprocessor with on-chip debug system. The system consists of an integrated development environment on host PC, a probe subsystem transferring and controlling commands and a target CPU that supports JTAG standard. It assures the correctness of system partition and the behavior of subsystems through a software/hardware co-design and co-verification methodology, and reduces the design cycle.