基于CTGAL电路的绝热4-2压缩器和乘法器设计

Design of adiabatic 4-2 compressor and multiplier based on CTGAL circuit

通过对并行乘法器和钟控传输门绝热逻辑(Clocked Transmission Gate Adiabatic Logic,CTGAL)电路工作原理及结构的研究,提出了基于CTGAL电路的绝热4-2压缩器的设计方案,与传统CMOS逻辑的4-2压缩器相比,此压缩器节省平均功耗约87%。在此基础上,进一步设计了4×4位绝热乘法器,HSPICE模拟结果表明了所设计的电路具有正确的逻辑功能和显著的能量恢复特性。

Through the study of the working principle and structure of parallel multiplier and Clocked Transmission Gate Adiabatic Logic （CTGAL） circuits, a design scheme of adiabatic 4-2 compressor is proposed based on the CTGAL circuit. The adiabatic 4-2 compressor could averagely save up to ～ 87% energy compared to traditional CMOS 4-2 compressor. Then a 4×4bit adiabatic multiplier is further designed by using the adiabatic 4-2 compressor. HSPICE simulation results verifies the valid functionality and the significant energy recovery characteristic of the designed circuits.