SoPC光纤通道控制器IP核的仿真验证

Simulation and verification of SoPC-based fibre channel controller IP core

通过片上可编程系统(SoPC)设计方法构建光纤通道(FC)控制器,详细分析了硬件设计的功能模块图.FC控制器硬件集成了NIOS II处理器、DDR SDRAM控制器、flash控制器、定时器、串口和带Avalon接口的光纤通道接口逻辑,通过Avalon交换总线进行互连.采用自底向上的方法,分别从功能模块级、知识产权(IP)核级和系统级给出了FC控制器的仿真验证框架,并用Altera公司的Stratix GX系列现场可编程逻辑门电路(FPGA)进行了上板调试.验证结果表明,提出的仿真验证方案正确可行,能较好地完成验证任务.

The structure and function module of FC（fihre channel） controller was analyzed by SoPC （system on programmable chip）. NIOS II processor, DDR SDRAM controller, flash controller, tim er, UART （universal asynchronous receiver/transmitter）, JTAG （joint test action group） and FC us er logic were integrated through Avalon fabric bus in the hardware of FC controller. A verification framework for FC controller, including three levers： module level, IP （intelligence privilege） core level and system level, is proposed and applies to the Altera＇s Stratix GX FPGA （field program gate ar ray）. The result showed that the verification scheme is feasible and task is finished effectively.