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基于SoPC的神经网络速度控制器的实现

Realization of neural network speed controller based on SoPC
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摘要 一种基于 SoPC 的神经网络速度控制器的设计方案。速度控制器采用神经网络参数辨识自适应控制,以现场可编程门阵列(FPGA)为硬件平台,用 Nios Ⅱ软核处理器作为上位机,实现一个完整的速度控制器的片上可编程系统(SoPC)。实验结果表明,该控制系统能够满足现代速度控制系统高速度、高精度的要求。 This paper presented a design of neural network speed controller based on SoPC. The speed controller used the BP neural network parameter identification control, which was carried out on field programmable gate arrays(FPGA), with Nios Ⅱ softcore processor as superordination controlling machines to achieve a speed controller on SoPC. Experimental results show that the control system can meet the modern speed control system's high-speed and high-precision requirements.
出处 《电子技术应用》 北大核心 2008年第11期27-29,33,共4页 Application of Electronic Technique
关键词 神经网络 速度控制 片上可编程系统 neural network speed control SoPC
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