基于ARM和CPLD的数字存储示波器的设计

Design of Digital Oscillograph Based on ARM and CPLD

本文对基于ARM(Advanced RISC Machine)和CPLD(Complex Programmable Logic Device)的数字存储式示波器的设计过程进行了介绍。主要对系统的硬件和软件设计部分进行了分析。硬件设计部分首先给出了系统框图,然后对各个组成模块进行了介绍。并给出了各模块所使用的主要元器件。软件设计部分首先对基于?C/OS-Ⅱ的嵌入式操作系统进行了介绍。?C/OS-Ⅱ是一种源码公开、可移植、可固化、可裁减、可剥夺的操作系统内核。软件设计部分的另一个工作是对CPLD进行编程。本文所介绍的数字存储式示波器可用于电子设计、电子维修和教育等行业。

This paper describes the design of digital oscillograph based on ARM （Advanced RISC Machine）and CPLD（Complex Programmable Logic Device）. The design of hardware and software is the paper＇s main contents. At first, the hardware design pari describes the floorplan of this system. Then, every module is introduced in the paper. The paper lists the main apparatus that are used in the system. The software part introduces the embedded operation system based on ？C/OS-II. ？C/OS-II is a code-open system kernel, which is portable, ROMable, scalable and preemptive. Configuration to CPLD is another content of software design. The oscillograph this paper discusses can be used in circuit design, electronic repairing and education.