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衬底温度对低温制备纳米晶硅薄膜的影响 被引量:3

Effect of substrate temperature on the nano-crystalline silicon thin film deposited at low temperature
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摘要 采用传统的射频等离子体增强化学气相沉积技术,在较高的工作气压130Pa和较高的射频功率70W下,在>100℃的低温下,以0.14nm/s速率制备出优质的纳米晶硅薄膜。研究结果表明,薄膜晶化率和沉积速率与衬底温度有密切关系。当衬底温度>100℃,薄膜由非晶相向晶相转化,随着衬底温度的进一步升高,薄膜晶化率增大,当温度为300℃时,薄膜的晶化率达82%,暗电导率为10-4Ω-1.cm-1数量级,激活能为0.31eV。当薄膜晶化后,沉积速率随衬底温度升高而略有增加。 Nano-crystalline silicon thin films(nc-Si: H) with deposition rate of 0. 14nm/s were prepared by the conventional plasma enhanced chemical vapor deposition(PECVD) technique under the higher deposition pressure(130Pa),higher RF-power(70W) and low substrate temperature over 100℃. The results showed that the crystalline fraction and deposition rate are in close relation with the substrate temperature. When the substrate temperature changed from 100-150℃, the films change from amorphous phase to crystalline phase. Then the crystalline fraction increases with the increase in substrate temperature. When the substrate temperature is 300℃, the crystalline fraction reaches 82 %, dark-conductivity value is about 10^-4Ω^-1·cm^-1, activation energies is 0.31eV. The deposition rate increases slightly with the increasing of substrate temperature when the films are crystallized.
出处 《功能材料》 EI CAS CSCD 北大核心 2008年第11期1853-1855,共3页 Journal of Functional Materials
基金 韩山师范学院青年科研基金资助项目(0503) 韩山师范学院扶持科研课题资助项目(FC200508)
关键词 纳米晶硅薄膜 衬底温度 微结构特性 电学性能 nano-crystalline silicon thin films substrate temperature micro-structural properties electrical characterizations
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