基于VHDL实现8086 IP核的设计

A Design of the 8086 IP Core Based on VHDL

本文介绍了8086的内部结构和工作原理，其中包括执行单元、总线接口单元、算术逻辑单元、寄存器组和地址加法器。使用VHDL实现了IP核的设计，并使用Modelsim进行了仿真，仿真结果表明IP核可以正常工作。

This article introduces the inner structure of 8086 and the working principle. It includes the EU（Executing Unit）, BIU（Bus Interface Unit）, ALU （Arithmetic Logical Unit）, the an-ay of registers and address adder. Implemented the 8086 IP core with VHDL, and simulated the design with Moddsim. The simulation results show that the IP core works normally.