直扩信号数字载波环的FPGA设计与实现

Design and Implementation of DSSS Signal Digital Carrier Loop on FPGA

在DSSS(直接序列扩频)系统中,载波同步是关键技术之一,其同步时间及精度在一定程度上直接影响着整个系统性能的优劣。结合一个具体的工程实例,以FPGA为设计平台,对BPSK调制方式的DSSS信号Costas环载波恢复电路进行了设计,详细阐述了全数字化Costas环路各部件的参数设计方法。最后给出了实现后的仿真测试数据,仿真结果表明,该Costas环路具有十分优良的性能(输入信噪比为0dB时,环路锁定后相位抖动小于5度)。

Carrier synchronization is one of the key techniques in the DSSS（ Direct Sequence Spread Spectrum） system, and synchronization time and precision can affect the system＇ s performance directly. An all - digital DSSS Signal Costas loop carrier recovery circuit is implemented on FPGA （Field Programmable Gate Array） for a concrete engineering instance. Parameters and design of each part of the loop are described in detail. Finally, the test data is proposed and the simulation results show that high performance can be achieved using this kind of all - digital Costas loop （ phase error is less than 5 degrees when input SNR is 0dB）.