摘要
为设计嵌入式折反射全景实时成像系统,在FPGA上通过查表实现折反射全景图像展开,并结合FPGA特点,采用图像分块展开、时间隐藏数据读写技术、FPGA流水线等方法提高展开速度。实验表明,将1024×768 YUV4∶2∶2格式源图像展开为1280×256 YUV4∶2∶2格式目标图像,速度可达100fps,展开速度比基于单像素的全景查表展开提高约12倍。
In order to design a real-time embedded system for catadioptric omni-directional images, a look-up table approach for omni-directional images was used on FPGA. Combined with FPGA features, some methods were used to improve the speed of panorama unrolhng, including dividing image into blocks and unrolling the image blocks, time-hidden data access technology and FPGA pipeline technology, etc. Experiments indicate that the methods make the unrolling achieve a level of 100 frames per second, when dealing with 1024 ×768 YUV 4: 2:2 source image to 1280 ×256 YUV4: 2:2 target image. It is 12 times faster than a lolk-up table panorama unrolling based on single pixel.
出处
《计算机应用》
CSCD
北大核心
2008年第12期3135-3137,3140,共4页
journal of Computer Applications
基金
国家自然科学基金资助项目(60773023)
中国博士后科学基金资助项目(20070410977)
湖南省自然科学基金资助项目(08JJ4018)