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复合域算法的AESS盒电路实现 被引量:2

AES S-Box Circuit Implementation Based on Composite Field Arithmetic
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摘要 提出一种基于复合域算法的全定制AES S盒架构,采用传输门逻辑实现了精简的、低功耗数据通道电路.在数据通道中插入异步握手电路控制的锁存器以控制信号抖动的传播,达到降低整个S盒功耗的目的.利用插入随机延时链的方法提高了S盒的抗差分功耗分析能力.在0.25μm CMOS工艺下的S盒电路版图后仿真结果表明,本S盒电路具有低功耗、高安全性的优点,并保持复合域S盒电路所具有的面积小的特点. A full-custom AES S-box architecture based on composite field is proposed. In this S-box, pass transmission gate (PTG) logic style is used to obtain a compact and low-power data-path circuit. Latches controlled by an asynchronous handshake circuit are inserted in the data-path to prevent propagation of the signal glitch, resulting in reduction of the total S-box circuit power. The property of resisting differential power analysis (DPA) attack of the S-box is improved by inserting random delay chains. The layout-simulations for the S-box circuit using 0.25 μm CMOS technology show that it has low power consumption and high-security, and remains small-area overhead as in the corresponding composite field S-box.
出处 《应用科学学报》 CAS CSCD 北大核心 2008年第6期622-626,共5页 Journal of Applied Sciences
基金 国家“863”高技术研究发展计划基金(No.2006AA01Z226) 华中科技大学重点基金(No.2006Z001B) 2007年度新世纪优秀人才支持计划基金(No.NCET-07-0328)资助项目
关键词 S盒 复合域 传输门 异步电路 随机延时链 S-box, composite field, pass transmission gate (PTG), asynchronous circuit, random delay chain
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参考文献12

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共引文献2

同被引文献26

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