高效实现FPGA数字下变频的多类滤波器分组级联技术

Implement on Cascade Division of Multi-types Filter about FPGA DDC

对各种实现数字下变频的方法进行比较,在对数字下变频已有的许多高效的算法做了总结和归纳后,为了解决系统实现时乘法器需求过高的局限,通过合理的滤波器分解和级联、选择适当的滤波器系数和流水线技术,给出了系统的FPGA实现方案,并在Virtex-5上给出了Verilog具体实现和仿真,结果证明:FPGA设计的DDC各项指标满足系统设计要求。

At first,many methods of achieving DDC are compared. After many efficient arithmetic of DDC are summarized and concluded,the disadvantage of requiring too many multiplicators when actualize the system is resolved by decomposing and series - linking of filters and choosing coefficients of filters correctly as well as using pipeline patterns. At last, the scheme which is implemented by FPGA is presented as well as the realizing and emulating by Verilog on Virtex - 5 are given. The conclusion is：all of the functions and performance demanding of DDC which are accomplished by FPGA are satisfied.