基于共享内存的MVB与LON总线网关设计

Shared Memory Based MVB and LON Bus Gateway Design

针对目前列车上多种总线共存的状况,为实现多功能车辆总线(MVB)总线与LON总线设备之间数据交换,提出一种基于共享内存的MVB与LON总线网关设计方案;该网关采用FPGA实现MVB总线设备间数据通信,采用Neuron3150芯片实现LON总线设备间数据通信,利用共享内存的方式交换数据,通过数据源设定访问权限,避免实现数据访问冲突,从而实现两个总线设备间信息相通;测试结果表明MVB与LON总线网关结构设计合理,数据传输可靠。

At present there are multiple buses in existence in a train. In order to implement data exchange between Multifunetion Vehicle Bus （MV-B） and LON bus devices, this paper proposes a shared--memory--based Multifunction Vehicle Bus （MVB） and LON Bus gateway design scheme. This gateway adopts FPGA to implement data exchange in a shared--memory manner, and sets access modifiers using data resource to realize conflict--free data access. Consequently it realizes the information communication between both the bus devices. And the testing results show that the structure design between MVB and LON bus gateway is rational and the data transmission is credible.