提升HV PMOS漏极击穿电压的工艺改进方法

A Process Improvement to Enhance the HV PMOS Drain Breakdown

文中讲述了一种通过改进高压PMOS源漏极轻掺杂扩散结构(LDD),来提升高压PMOS的漏极击穿电压的工艺改进方法,并且该工艺改进不影响其他器件性能。分析了工艺改进提升漏极击穿电压的机制。

This paper describes a process improvement for the HV PMOS LDD structure to enhance the HV PMOS drain breakdown voltage without impact on other device performance, and analyzes the mechanism of how the process improvement enhances the drain breakdown voltage.