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支持8253控制字32位可编程计数器软核的设计与实现 被引量:2

Implementation and Design of 32 b PIT Soft Core Based on 8253
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摘要 8253作为Intel公司推出的可编程定时计数器,用来产生定时信号。分析传统8253功能以及缺陷,结合FPGA的特点,设计支持8253控制字格式具有自主知识产权的32位可编程定时计数器软核P32IT8253。详细分析对设计中关键路径的产生原因,给出一种便于在不同器件公司产品间移植的优化设计方法。软核通过仿真,下载到Xilinx的FPGA中。整个设计针对提升传统8253/8254配合单片机或者接口板中控制电路的性能,提供了一种解决方案。 As a product launched by Intel,8253 is applied to generate time - lapse signal. 8253 functional and its shortage are analysed,based on the character of FPGA, 32 b Programmable Interval Timer(PIT) IP core supported by 8253 control words is designed. While analyzing the cause to critical path, to introduce a kind of optimized solution can be easy to transplant in any products from different companies. The IP has been passed simulation and downloaded in FPGA. The entire design provids a solution scheme,aiming at improving the performance of the traditional 8253/8254 controlled by single chip computer or PC interface board.
出处 《现代电子技术》 2008年第24期1-3,6,共4页 Modern Electronics Technique
关键词 可编程定时计数器 硬件描述语言 SOPC IP软核 programmable interval timer hardware description language SOPC IP soft core
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参考文献9

  • 1Xilinx Corporation. FPGA 与 ASIC 对比 [S]. Xilinx, 2008.
  • 2Intel Corporation. 8253 - Programmable Interval Timer [S]. 1986.
  • 3张义伟,韩威.可编程定时计数器8254的IP软核设计[J].舰船电子工程,2005,25(2):68-71. 被引量:2
  • 4闫永志,刘伟,何方.基于FPGA的可编程定时器/计数器8253的设计与实现[J].电子设计应用,2004(2):26-28. 被引量:7
  • 5Zinunerman R. Binary Adder Architectures for Cell - based VLSI and their Synthesis [D]. Swiss Federal Institute of Technology ,Zurich, 1997:67 - 91.
  • 6[美]Samir Palnikar.Verilog-HDL数字设计与综合[M].2版.北京:电子工业出版社,2004.
  • 7[美]Michael D Ciletti.Verilog-HDL高级数字设计[M].北京:电子工业出版社,2004.
  • 8[美]Micheal John Sebatian Smith.专用集成电路[M].第2版.北京:电子工业出版社,2004.
  • 9[美] Barry P Brey. Intel Microprocessors: Architecture, Programming and Interfacing[M]. Sixth Edition,2003.

二级参考文献3

  • 1[2]Intel Microprocessors. Volume I & II. Printed in USA/0192/45K/RRD/DDM,1992
  • 2[3]The Programmable Logic Data Book 2002, Insight, A Division of Memec(Asia Pacific) Ltd,2002
  • 3[4][美]Barry B. Brey著.The Intel Microprocessors Architecture,Programming,and Interfacing Sixth Edition

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