H.264整数DCT的FPGA实现

Implementation of Integer DCT in H.264 on FPGA

H.264整数DCT变换算法有助于减少计算复杂度,提高编码速度,进一步提高视频或图像的压缩效率。分析H.264整数DCT变换的快速算法及其实现原理,并提出一种用来具体实现一个4×4块的DCT变换的结构;同时给出用VHDL语言实现4×4块DCT变换的内部模块的源代码和仿真波形。仿真结果表明用该算法可快速实现一个4×4块的整数DCT变换。提出一种切实可行的用于H.264整数DCT变换的结构,该结构可完全用硬件电路快速实现;对于用FPGA实现H.264整数DCT变换做了一次实践性的尝试,对深入理解H.264整数DCT变换及其算法的具体实现具有一定的实践意义。

The algorithm of integer transform in H. 264 is good to reduce the complexities in computations and it is good to improve the speed in encoder,it can greatly improve the compress rate of videos or images from this. This article analyses the fast algorithm and principle of the integer in H. 264,and privides an specific architecture which to be used to implement a 4 × 4 DCT transform;and gives the source codes and simulated waves in 4 × 4 DCT transform which implemented in VHDL. The result of simulation shows that the algorithm can fast implement a 4 ×4 DCT transform. The new thoughts of this article lie that it privides a practical architecture used in integer DCT transform in H. 264. It can be implemented quickly in circuit through hardware, and it is a practical taste in the implemention of integer DCT transform in H. 264 on FPGA. It is good to understand the integer DCT transform in H. 264 deeply,it also has certain practical meanings in the specific implemention in integer DCT transform in H. 264.