摘要
本文设计了一种通用的边界扫描时钟单元。这些单元可作为标准单元建立在标准单元库中以提高ＶＬＳＩ设计效率。同时讨论了两种用边界扫描技术测试高速芯片工作频率的方法。
A general purpose JTAG Boundary-Scan Clock Cell is designed in this paper. This cell can be built as a standard cell to improve the VLSI design. Two ways to test the frequency of ICs by the Boundary-Scan technology are discussed in the paper.
出处
《小型微型计算机系统》
EI
CSCD
北大核心
1998年第2期38-43,共6页
Journal of Chinese Computer Systems
