摘要
硬件描述标准语言VHDL已成为一种国际标准,它在实现电子设计自动化及计算机协同设计方面起着重要的作用.本文简要地介绍VHDL模型,并以实例说明它在逻辑设计与综合中的应用.
The Hardware Description Language VHDL has become an international standard, and plays an important role in electronics design automation. The paper introduces briefly the VHDL models, and states its application in logic design and synthesis.
出处
《江苏理工大学学报(自然科学版)》
1998年第1期35-40,共6页
Journal of Jiangsu University of Science and Technology(Natural Science)