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基于0.5μm CMOS工艺的高速运放 被引量：2

High-Speed Operational Amplifier Based on 0.5 μm CMOS Process
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摘要 设计了高单位增益带宽积、大摆率、宽输出摆幅的运算放大器,该运算放采用了两级全差动结构.设计采用增加1个前馈放大级电路,以此产生1个左半平面零点并与第一个次极点相抵消的频率补偿方案,达到了环路稳定的要求.另外,提出一种新颖的共模反馈(CMFB)方案,使共模抑制比达到62dB,电路采用CSMC公司的0.5μm CMOS数模混合信号工艺设计并经过流片.测试结果表明,在单电源3.3 V电压下,运放的直流增益为65.5 dB,单位增益带宽积达350 MHz以及±2.7 V的输出摆幅. A design methodology of high-speed operational amplifier （Op-amp） with high frequency of unity-gain bandwidth, high slew rate and large output swing is proposed. The structure with two-stage fully differential CMOS circuit was used in the op-amp, and the non-dominant pole was canceled by using a zero in left plane which is produced by adding a feed-forward amplify circuit. Moreover, obtain high stability of the common-mode, a novel CMFB structure is used. As a result, the value of CMRR was increased to be 62 dB. The chip is implemented by using CSMC 0.5 μm CMOS mixed-signal technology. The measurement results indicate that under the condition of supplied voltage of 3.3 V, the op-amp gets a DC voltage gain of 65.5 dB, unity-gain bandwidth of 350 MHz and output swing of ± 2.7 V.
作者 葛康康 陈琛 何乐年
机构地区 浙江大学超大规模集成电路研究所
出处 《江南大学学报（自然科学版）》 CAS 2008年第6期652-656,共5页 Joural of Jiangnan University (Natural Science Edition)　
基金 浙江省重点科技计划项目(2007C2102)
关键词 运算放大器 高速 频率补偿 共模反馈 全差动 high-speed operational amplifier frequency compensation common-mode feedback fully differential
分类号 TN432 [电子电信—微电子学与固体电子学]
  • 相关文献

参考文献10

  • 1郭荣祥,李亦群,高工.高速运算放大器应用技术[J].电子技术应用,1998,24(4):68-70. 被引量：10
  • 2Schlogl F, Dietrich H, Zimmermann H. High-gain high-speed operational amplifier in digital 120 nm CMOS [ J ]. IEEE International Symposium on Circuits and Systems, 2004,8:316-319.
  • 3毕查德·拉扎维.模拟CMOS集成电路设计[M].西安:西安交通大学出版社,2003:337-338.
  • 4李建中,汤小虎,魏同立.一种低电压CMOS折叠-共源共栅跨导运算放大器的设计[J].微电子学,2005,35(4):412-415. 被引量：23
  • 5陈朝阳,胡小波,付生猛.一种采用增益增强方法的CMOS全差分运算放大器[J].微电子学,2005,35(1):81-84. 被引量：11
  • 6Ka Nang Leung, Mok P K T. Analysis of multistage amplifier-frequency compensation[ J]. IEEE Circuits and System,2001,48 (9) :1041-1056.
  • 7Banu M, Khoury J M, Tsividis Y. Fully differential operational amplifiers with accurate output balancing[ J ]. IEEE J Solid-state Circuits, 1988, 23 (6) : 1410-1414.
  • 8Hammouda S A, Tawfik M S, Ragaie H F. A 1.5 V opamp design with high gain wide bndwidth and its application in a high Q bandpass filter operating at 10.7 MHz[ J ]. IEEE International Symposium on Circuits and Systems, 2002,3 : 185-188.
  • 9Thoutam S, Ramirez-Angulo J, Martin A L, et. al. Power efficient fully differential low-voltage two stage class AB/AB architectures [ J].IEEE International Symposium on Circuits and Systems, 2004,4:733-736.
  • 10Mark Burns, Gordon W Roberts. An Introduction to Mixed-Signal IC Test and Measurement [ M ]. Oxford: Oxford University Press, 2001: 284-293.

二级参考文献18

  • 1Bult K, Geelen G. A fast-settling CMOS op amp for SC circuits with 90-dB dc gain [J]. IEEE J Sol Sta Circ, 1990, 25(8): 1379-1394.
  • 2Sun R, Peng L. A gain-enhanced two-stage fully-differential CMOS op amp with high unity-gain bandwidth [A]. IEEE Int Symp Circ and Syst [C]. 2002.428-431.?A
  • 3Das M. Improve design criteria of gain-boosted CMOS OTA with high-speed optimizations [J]. IEEE Trans Circ and Syst-Ⅱ. 2002, 49(3): 204-207.?A
  • 4Miao G Q, Tang P S. Design considerations for a high performance OTA with fully differential gain enhancement [A]. Int Conf SSTCT [C]. Beijing, China.1995. 115-118.?A?A
  • 5Ong A K, Wooley B A. A two-path bandpass ∑-△ modulator for digital IF extraction at 20 MHz [J].IEEE J Sol Sta Circ, 1997,32 (12): 1920-1934.
  • 6Malcovati P, Brigati S, Francesconi F, et al. Behavioral modeling of switched-capacitor sigma-delta modulators [J]. IEEE Trans Circ Syst I: Fundamental Theory and Applications, 2003, 50 (3) : 352-365.
  • 7Nishimura K A, Gray P R. A monolithic analog video comb filter in 1.2-μm CMOS [J]. IEEE J Sol Sta Circ, 1993, 28(12): 1331-1340.
  • 8Van Peteghem P M, Duque-Carrillo J F. A general description of common-mode feedback in fully- differential amplifiers [A]. IEEE Int Syrup Cire and Syst [C].1990. 3209-3212.
  • 9Salo T, Lindfors S, Halonen K A I. A double-sampling SC-resonator {or low voltage bandpass delta sigma modulators [J]. IEEE Trans Circ Syst Ⅱ: Analog and Digital Signal Processing, 2002, 49 (12): 737-748.
  • 10Liu S-I, Kuo C-H, Tsai R-Y, et al. A double-sampling pseudo-two-path bandpass △-∑ modulator [J]. IEEE J Sol Sta Circ, 2000, 35 (2) : 276-281.

共引文献127

同被引文献18

  • 1易清明,张静,石敏.低功耗CMOS集成运算放大器的研究与设计[J].微电子学,2007,37(3):414-416. 被引量：18
  • 2Ming-Dou Ker,Jung-Sheng Chen.Impact of MOSFET Gate- Oxide Reliability on CMOS Operational Amplifier in a 130-nm Low-Voltage Process.IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY,2008,7:394-405.
  • 3Schlogl F, Dietrich H,Zimmermann H.High-gain high-speed operational amplifier in digital 120 nm CMOS[J].IEEE International Symposium on Circuits and Systems,2004,8:316-319.
  • 4贾政亚.低压微功耗CMOS运算放大器的研究与设计[D].成都:电子科技大学出版社.2005.
  • 5RAZAVI.BI,陈贵灿等译.模拟CMOS集成电路设计[M].西安交通大学出版社,2002,12(2008,10重印):240-260.
  • 6冯军,李志群译.模拟集成电路设计[M].电子工业出版社,2005:3.109-117;212-217.
  • 7KER M-D, CHEN J-S. Impact of MOSFET gate-oxide reliability on CMOS operational amplifier in a 130- nm low-voltage process [J]. IEEE Trans Dev and Mater Reliab, 2008, 8(2): 394-405.
  • 8LIPKA B, KLEINE U, SCHEYTT J C, et al. Design of a novel cascoded CMOS opamp with high gain and ±1.5 V power supply voltage [C] // 16th Int Conf Mixed Design of Integr Circ & Syst. Lodz, Poland. 2009 : 252-255.
  • 9AHMADPOUR A, FOULADI R. A modified high performance structure of low voltage CMOS op amp [C] // IEEE Int Conf Elec Dev and Sol Sta Circ. Hong Kong, China. 2008: 1- 5.
  • 10SCHLOGL F, DIETRICH H, ZIMMERMANN H. High-gain high-speed operational amplifier in digital 120 nm CMOS[C] // IEEE Int SOC Conf. Santa Clara, CA, USA. 2004: 316- 319.

引证文献2

二级引证文献3

江南大学学报（自然科学版）
2008年 第6期

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