摘要
介绍了电力故障动态记录装置硬件部分的设计。针对当前电力故障动态记录装置在分析处理算法的效率和精确度上的不足,研究并提出了迭代傅里叶算法与测频算法。这些算法已被成功应用在电力故障动态记录装置开发中。
The hardware part of power fault dynamic recording device was designed. Aiming to the present power fault dynamic recording device lack efficiency and accuracy in the processing algorithms, the Fourier iterative algorithm and frequency measurement algorithm were studied and proposed. These algorithms had been successfully applied in the development of power fault dynamic recording device.
出处
《低压电器》
北大核心
2008年第24期35-37,41,共4页
Low Voltage Apparatus
关键词
电力故障动态记录
智能建筑
嵌入式处理器
频率测量
power fault dynamic recording
intelligent building
embedded processor
frequency measurement
