摘要
从视频信号的特征出发,简要说明了实时视频压缩的常用算法及其国际标准。通过系统地分析视频压缩算法中内在的模块特性和并行特性,结合数字信号处理领域中具有并行实现机制的典型硬件结构,得出了可用于实时视频压缩的两种单片硬件结构模型。最后通过实例分析,证明了这两种结构模型的有效性。
Common algorithms and international standards on real time video compression are briefly explained.Two monolithic hardware architectural models oriented to real time video compression are derived through systematically analyzing the inherent modularity and parallelism embedded in video compression algorithms,and combined with typical hardware structures having parallelism mechanisms in DSP.Finally,effectiveness of the two models is demonstrated by some practical chips.
出处
《微电子学》
CAS
CSCD
北大核心
1998年第1期16-22,共7页
Microelectronics
关键词
专用集成电路
实时视频压缩
视频编码
DSP
ASIC,Digital signal processing,Real time video compression,Video coding,