摘要
高性能多芯片系统中,互连延迟对整个系统的延迟结果起决定性作用。利用量纲分析法首先对MCM的互连延迟进行数学建模,继而利用曲线拟合法求出了所建数学模型中的待定系数,并进一步对此结果进行了必要的分析。该方法的优点是不涉及传输线的电报方程,避免了复杂的数学运算,得到的互连延迟模型能有效地模拟互连延迟的实际情况。
Models for interconnection delays in MCM’s are established using dimensional analysis The coefficients in the mathematical model is obtained by curve fitting method Futher analysis of this approach and experimental results are also presented With the proposed technique,the need for complex mathematical operation is eliminated and the resultant model can efficiently simulate the actual interconnection delays in MCM’s
出处
《微电子学》
CAS
CSCD
北大核心
1998年第1期41-44,共4页
Microelectronics
关键词
多芯片组件
建模
互连延迟
量纲分析
Multi chip module,Modeling,Interconnection delay,Dimensional analysis