摘要
通过改进传统电路结构,设计出了一种低压差线性稳压器。通过解决系统上电所带来的一些问题,达到了低功耗的设计目的。给出了带隙基准源和误差放大器等关键电路的设计方法,采用和舰0.35μmCMOS工艺模型Spice进行了仿真,验证了设计的正确性。
A design of LDO voltage regulator is presented. The traditional structure of LDO circuit was improved. The starting-up problem of the system power was resolved, and the objective of low-power consumption was realized. The key circuits such as the bandgap voltage reference and the error amplifier were designed in HEJIAN＇ s 0.35 μ m CMOS process. Simulation results proved the validity of the design.
出处
《中国集成电路》
2009年第1期20-22,67,共4页
China lntegrated Circuit
