基于标准CMOS工艺的一款宽带限幅放大器芯片设计

A Wideband Limiting Amplifier design of Basing on CMOS Technics

采用SMIC0.35μmCMOS混合信号工艺来设计开发一款适用于SDHSTM-16的光接收机前端限幅放大器芯片。该限幅放大器的设计采用了电容中和技术来实现带宽的扩展,可满足2.5Gbps速率要求,芯片电路拥有信号丢失检测和自动静噪功能。芯片版图的参数提取仿真表明:芯片最小输入动态范围可达2mV,50Ω负载上的双端输出摆幅约为1400mVpp,在3.3V供电下静态功耗仅为66mW,动态功耗为105mW,有实际推广价值。

A 2.5Gbps limiting amplifier was realized in SMIC 0.35 μm CMOS mixed signal process for optical receiver＇ s front end. This limiting amplifier uses capacitance neutralization technology to improve bandwidth and can satisfy 2.5 Gbps requirement for SDH STM-16 system. The chip also includes detecting lost signals and automatic squelch module. The post-simulation results show that this chip offers an input dynamic range as small as 2 mV, and provides a constant double-end output of 1.4 Vpp over a 50 Ω load. The static power dissipation is only 66 mW and dynamic power dissipation is 105 mW with the supply voltage of 3.3 V.