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基于FPGA的16阶FIR滤波器的设计与实现 被引量:5

Design and implementation of 16 order FIR filter based on FPGA
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摘要 分析FIR滤波器的结构特点和基本原理,提出FPGA实现数字信号处理的方案.基于Matlab用窗函数法对FIR滤波器进行了设计,确定了滤波器的系数,最后用VHDL语言实现了16阶常系数FIR滤波器,并用QuartusⅡ软件对滤波器进行了逻辑仿真,结果符合设计预期. The configuration and keystone of the FIR filters were analyzed in this article, it advanced a project of DSP based on FPGA. The article designed a FIR filter by windows in Matlab and ascertained coefficients of the FIR. A 16 - steps invariable coefficients FIR filter was implemented with the VHDL code, furthermore, the filter was simulated in logic by QuartusⅡ. The results showed that the anticipation of design could be reached.
作者 张海军
出处 《安徽大学学报(自然科学版)》 CAS 北大核心 2009年第1期62-65,69,共5页 Journal of Anhui University(Natural Science Edition)
关键词 FPGA FIR数字滤波器 MATLAB VHDL语言 Quartus FPGA FIR digital filter Matlab VHDL QuartusⅡ
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参考文献4

  • 1胡广书.数字信号处理--理论、算法与实现[M].北京:清华大学出版社,2002.
  • 2Oh Hyuk J, Lee Yong H. Design of discrete coefficient FIR and IIR digital filters with Prefilter-Equalizer structure using linear programming[J]. IEEE Transactions on Circuits and Systems II:Analog and Digital Signal Processing,2000.47(6),562 -565.
  • 3蒋垒,王昌林,刘鎏,许冲.基于FPGA的FIR数字滤波器算法实现[J].舰船电子工程,2006,26(1):151-156. 被引量:10
  • 4Uwe Meyer -Baese. Digital signal processing with field programmable gate arrays[ M ]. 2nd ed.北京:清华大学出版社,2006:31-55.

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