一种基于CMOS工艺的Gbps高速LVDS发送电路

A Gbps High Speed LVDS Transmitter in CMOS Technology

低压差分信号(LVDS)是用于高速低功耗数据传输的一种非常理想的传输技术。由于使用全差分技术和低电压摆幅,LVDS技术达到高速度的同时消耗的功耗非常小。设计了一种具有Gbps发送速度的LVDS发送电路。通过在输出采用闭环控制模式,使得LVDS输出共模电平和电压幅值被控制在一个合理的范围内。基于SMIC0.18μmCMOS工艺模型,采用Hspice仿真器对整个发送电路进行模拟,结果表明所设计的发送电路具有4Gbps发送速度,功耗仅为18.6mW。

LVDS （Low Voltage Differential Signaling） is a very good choice of transmission technology for highspeed interface operation at a very low level of power consumption. Due to the differential transmission technique and the low voltage swing, LVDS allows high transmission speeds and low power consumption at the same time. The design of a transmitter operating at the speed of Gbps data rate is presented. In the proposed transmitter, the required tolerance on the dc output levels was achieved by means of a closed-loop control circuit. Based on SMIC 0.18 μm CMOS technology model the whole circuit is simulated by Hspice. The simulation results show that the driver could work stably under the frequency of 4 GHz data rate, with the power consumption of 18.6mW.