摘要
本文首先介绍CORDIC算法和正交调制的基本原理,对基于流水线的CORDIC内核及前处理单元做了详细分析。给出了一种基于流水线的CORDIC算法来产生正交函数的信号发生器,在传统CORDIC算法的基础之上,通过采用流水线技术,优化参数,具有很高的精度和很快的速度,使设计出的硬件能够在精度要求较高的场合中使用。用Verilog HDL对其编程设计,进行功能仿真和时序仿真,及硬件下载,结果表明该信号发生器具有很好的实用性。
This paper first introduces the principle of CORDIC algorithm and orthogonal modulation technology,then it gives detailed analysis of pipelining CORDIC kernel cores and processor unit for the design,a new way of orthogonal signal generator based on pipelining CORDIC is proposed. Based on the traditional CORDIC algorithm,it improves the calculation precision through using pipelining technology and optimizing the arguments,making the orthogonal triangle function adapted to higher precision required occa-sion. Finally programming and designing the CORDIC,carries out the function simulation and timing simulation,downloading it to the FPGA,the result shows that it has a great practicability.
出处
《微计算机信息》
北大核心
2008年第36期268-269,252,共3页
Control & Automation
基金
广西研究生教育创新项目项目名称:<基于CORDIC算法的浮点协处理器的设计与实现>(2007105950810m15)颁发部门:广西壮族自治区学位委员会
广西壮族自治区教育厅
项目申请人:李全
陈石平