摘要
在现代微处理器的设计中,Cache是整个处理器性能的决定因素。本文描述了64位RISC微处理器"OpenSPARC T1"中的Cache的功能和结构,并提出对"OpenSPARC T1"中的Cache的优化方案。
In modern designing of microprocessor, Cache is the decisive factor to performance of the hole processor. In this thesis we describe the function and structure of Cache in "OpenSPARC Tl",which is 64 bits in RISC architecture, we also propose a method to optimize the performance of Cache in "OpenSPARC TI".
出处
《微计算机信息》
2009年第2期267-268,271,共3页
Control & Automation