摘要
分析边界扫描测试技术的工作机制和对测试支撑系统的功能需求,提出一种基于USB总线的高速边界扫描测试主控器的设计方案。利用CY7C68013作为USB2.0接口控制器,使用CPLD实现JTAG主控硬核,完成JTAG协议和USB总线协议的相互转换。JTAG的TCK时钟频率可调,最高可达48MHz。用户可利用该边界扫描控制器方便高效地进行边界扫描测试。
This paper analyzes the test mechanism of boundary-scan test and the functional requirement of test supported system, and presents a design project based on USB-bus high-speed boundary scan master controller. It uses CY7C68013 as USB2.0 interface controller and uses CPLD to implement JTAG master core. So it 'can accomplish conversion of JTAG protocol and USB-bus protocol, and can modulate the frequency of TCK which can run at a maximum rate of 48 MHz. Users can use this boundary-scan master controller to complete boundary scan test more expediently and efficiently.
出处
《计算机工程》
CAS
CSCD
北大核心
2009年第1期210-212,共3页
Computer Engineering