高速可配置Rijndael算法的设计与实现

Design and Implementation of High-Speed Configurable Rijndael Algorithm

针对网络通信的安全要求,给出了在集成电路设计中实现Rijndael算法的高吞吐率解决方案。对算法实现进行了优化,具有支持密钥长度和数据长度的可变选择与组合配置,加密和解密工作通道完全独立,全双工安全高速通信等特点。已通过了FPGA的验证与电路实现。通过对比分析综合仿真结果,该实现相对于目前已知的实现方案在性能和速度上具有很大的优势。

This paper presents high throughput implementations of the Rijndael algorithm, aiming at security re- quirement of network communication. The implementation is optimized, supporting selection and configuration of the key and data length, having physically independent encryption and decryption modules which can be used for secure high - speed duplex communication. Verilog design codes were synthesized and simulated. The results of implementation based on FPGA were analyzed, finding that our implementation has great advantage over the reported FPGA approaches on performance and speed.