基于FPGA的RS(31,23)编码器设计

Design and Implementation of RS(31,23) Encoder Based on FPGA

Reed-Solomon(RS)码是一种重要的纠错码,它对随机性和突发性错误有极强的纠错能力,广泛应用于数字视频广播(DVB)系统和其它数字通信领域。给出了一种GF(25)域上的RS(31,23)编码器的实现算法,介绍了用现场可编程门阵列(FPGA)实现RS编码器的原理和过程,并给出了实现电路及其仿真的输出波形。

Reed-Solomon （RS） code is a kind of important error correcting code,and it has very strong capability of correcting random and burst error,which is widely used in various modem communication systems. This paper describes the arithmetic to implement RS （31,23） encoder on GF （2% and introduces the process of design and implementation of RS（31,23） encoder based on FPGA. At the same time,the paper offers the circuit and simulation wave.