摘要
频率计的设计以PSoC CY8C29466-24PVXI为核心,由内部模块与外部电路的组合成其硬件电路,软件设计采用C语言。设计包括信号处理、定时器计数及数据显示3个主要部分,可以实现对信号频率的测定。由于设计中采用了分频,而且在PSoC中定时器最多可以达32位,所以频率范围比8位的单片定时器测得要广。
The frequency design takes the PSoC CY8C29466-24PVXI as the core and combines the internal and external circuit module into a hardware circuit. The software is designed using the C-language. The design includes three main parts： signal processing, timer count and data show. It can measures the signal frequency and l^e used to deter- mine whether the two signals are same or not. The design uses the frequency division and the timer can be up to 32 bit in PSoC. Hence the frequency range measured is much wider than that the SCM timer with eight bit.
出处
《成都信息工程学院学报》
2008年第6期622-625,共4页
Journal of Chengdu University of Information Technology
关键词
PSOC
定时器
整形
分频
PSoC
timer
plastic
frequency division
